HDI stands for High Density Interconnect. HDI PCBs have finer traces and trace spacing, laser drilled micro vias and higher connection pad density. Its two chief advantages are that it permits the use of fine pitch BGAs and it reduces the number of PCB layers required because the finer traces and smaller vias allow more circuitry in a smaller area.
Narrow trace widths mean higher circuit density
At PNC standard PC Board fabrication uses a minimum trace width of 5 mil, with a 5 mil space between traces (5/5mil) PNC’s HDI trace widths can be as narrow as 3 mil with 3 mil spacing. These finer traces allow 160% more traces in the same real estate. 3/3mil spacing will also allow two traces to escape between pads of a standard BGA, meaning less PCB layers are needed to fan out the pins from the BGA.
Microvias are the enabling technology for HDI
Narrow trace widths used in HDI PC Board are a result of the gradual refinement of photolithography and etching technology. Microvias on the other hand, are a revolutionary innovation driven by the development of high powered lasers that can be controlled accurately enough to ablate a 3 mil hole through the surface layer of copper and underlying laminate, without damaging the underlying layer of copper.
The minimum hole size for PNC’s laser drilled microvias are 3 mil and the minimum pad diameter for the microvia is 7 mil. Pads for laser drilled holes can be smaller than for mechanically drilled holes because of the location accuracy of the laser drilled hole. There is no mechanical deflection of the drill bit to account for. The laser drilled holes can be fully copper filled and planarized flat, so they can be used as pads for fine pitched BGAs with 0.4mm or smaller spacing. Using microvias as pads allows the signal trace to fan out by going straight down and out to an inner layer of the printed circuit board.
The biggest limitation with microvias is the aspect ratio of the holes. Where a drilled through hole can have a 10:1 depth to diameter aspect ratio, a laser drill can achieve no more than around a 1:1 aspect ratio. This means that the smallest microvia can only connect two adjacent copper layers. A larger diameter microvia can penetrate two layers. To connect deeper layers, the designer must stack vias one directly atop another.
Laser drilling of the microvias changes the way PCBs are fabricated and gives the designer flexibility that they do not have with through hole vias. In a standard drilled PCB, via holes are drilled and plated after the PCB fabrication stack-up is completed. Because the microvias can only bridge two or three copper layers, the microvias must be drilled and plated at each lamination step. This means that microvias can be fully buried between layers, stacked or staggered to allow the microvia to connect multiple layers of the stack up.
The major space saving advantage of the microvia technology is that vias can just connect traces that need to be connected, rather than taking up real estate all the way through the PCB the way a through hole via does.
The Printed Circuit Board designers at PNC take advantage of this by locating the power and ground layers at the top of the stack up. Since all active components access power and ground, sometimes through multiple pins, having the power and ground layers directly below the component layer allows all those connections to be made directly by microvias. This leaves the component layers and layers beneath the power and ground layers completely unobstructed for signal routing. This has the added advantage of reducing parasitic capacitance because it eliminates the circuit stubs caused by plated through holes.
Two sided boards are typically fabricated with a combination of through holes and microvias. Though holes can be drilled just through the core, connecting the stacks on the top and bottom of the board from the lowest layer, or through holes can be drilled through the entire stack directly connecting the traces on the top and bottom component layers.
HDI PCBs are a necessity when using fine pitched BGAs, but they can also reduce cost on PCBs without fine pitched BGAs because of the reduced layer count. On your next PCB design, talk to the experts at PNC. They can help you determine if HDI technology is can reduce your PCB cost by reducing layer count and shrinking the PCB size.
A schematic is an abstraction, a representation of an ideal circuit. A PCB Assembly, on the other hand, is a complex mechanical assembly. All the components in the circuit design must fit within the physical boundary of the PCB. The designer must locate and place hundreds of components subject both to the mechanical constraints of the product design and the manufacturing process while not introducing electrical noise into the circuit.
It can seem overwhelming to someone new to the PCB layout process. Fortunately, there are some simple guidelines used by the designers at PNC that will help break the layout task into manageable pieces.
Initial component placement considerations
Start by identifying the mechanical constraints on the component location. The Printed Circuit Board size and shape will be defined by the overall product configuration. Typically, the product’s mechanical design will define the location of the connectors, the keep-out zones and the locations of the heat sinks. The initial mechanical layout of the PCB is often an iterative process defined during design and early prototyping.
One recommended keep-out area is the perimeter of the board. The perimeter should be kept free to give the manufacturer a place to grip the PCB during assembly process, and room to score smaller boards to allow them to be removed from a larger multi-arrayed panel.
PNC recommends that all components be kept .050” from the PCB edge. Taller and more fragile components like capacitors should be kept .125” from the edge if possible, to allow room for tooling access to prevent damage when the PC Board is routed or scored from the panel.
The next step is to divide the PCB into functional modules to simplify routing and grounding. This will help minimize noise between power components, high speed digital components and analog components. Switching power supplies are particularly noisy, so the power supplies and their associated components should be grouped together as far as possible from noise sensitive sections of the circuit. While defining the location of the modules, be aware that high power components will need heat sinks, which may limit placement options.
Locating active components
Once the edge components are placed and functional areas of the Printed Circuit Board are defined, the next step is to locate the BGAs, quad packs and other large high pin count components. The room needed to fan out their pin counts is going to drive the locations of all the components around them.
In general, try to align the active components ICs with the #1 pin or A1 pin in the same orientation. While this may not have any utility in the actual circuit, it will make inspection and debugging of the initial prototypes far less frustrating.
Locating passive components
As a follow on to locating the active components, the bypass or decoupling capacitors on the power pins should be located as close to the IC as practical to minimize the parasitic inductance. If more than one capacitor is being used PNC recommends that the lowest value capacitor should place closest to the power pin. If components will be located on both sides of the PC Board, the bypass capacitors are often located on the opposite side, directly under the power pin. If possible, each power pin should have its own bypass capacitor.
Polarized components such as electrolytic capacitors and diodes should be arranged so they are all facing the same way. During debugging, it is much easier to spot the one diode that is not like the others rather than having to look at the silkscreen of each diode to determine if it is installed correctly.
Pull-up resistors and other groups of identical components are often grouped and lined up to simplify layout, debugging and inspection. Consider using resistor arrays when possible to save board space and reduce component count.
Inductors break this placement guideline. Because inductors generate magnetic fields, placing them too close together, particularly end to end, can cause inductive coupling, changing the value of the inductors.
Layout of double-sided boards
Double sided PCBs, PCBs with components on both sides, are expensive to produce, but may be necessary when real estate on the PCB design is tight, and when the overall product form factor is more important than PCB cost. A double-sided PCB is more expensive because it will need to pass though the pick and place machine and reflow oven twice.
Since the double-sided PCB will need to pass through the reflow oven twice, PNC recommends that the lighter and more heat resistant components be placed on the bottom of the board. Larger components on the bottom of the board will be glued to keep them from falling off, the smaller passive components cannot be glued, but the surface tension of the solder will hold them in place during the second pass through the oven.
Schedule a Design Review with your PCBA manufacturer
These are some general guidelines to aid in component placement used by the PCB designers at PNC. However, they are just guidelines. The best way to ensure that the printed circuit board assembly can be manufactured reliably is to have the layout reviewed by the people who will manufacture it. PNC’s designers can review your design to help reduce production cost and improve yield and reliability. Contact PNC today to schedule a review.
Solder pastes are amorphous putty-like soldering materials used to solder surface-mounted components to the Printed Circuit Board. The effect of solder paste on the PCB’s structural and functional integrity is the paramount factor to consider when deciding on selection of solder paste for application. Many factors which contribute towards the strength of the solder joint and its conduction efficiency need to be addressed as well. This is not just a discussion on what measures and precautions to take during PCB assembly and reflow, but also to put into question what a PCB design engineer should consider when designing a PCB and how the layout should adapt to the corresponding solder paste properties to yield the best result. It is a very brief introduction towards an expansive topic like solder pastes which will be discussed in further detail in future posts.
PROBLEM STATEMENT
A big concern for manufacturers arises when they need to select the right solder paste for SMT applications that is best suited to the PCB assembly and the manufacturing setup. A regular PCB has different types of components, all of which cannot always be compatible with the one solder paste applied across the board and thus, need some necessary compromises in solder selection. PCB designers should be educated about solder paste application and properties in SMT manufacturing to increase reliability of product yield.
SOLDER PASTE BASICS
Solder pastes are categorized based on the following characteristics: RoHS compliance (solder composition), flux type, grain size etc. RoHS (Restriction of Hazardous Substances) is a directive which mandates the exclusion of lead and other hazardous materials from solder pastes and manufacturing processes and aims to reduce environmental and occupational hazards related to electronics manufacturing. It has been adopted as a standard for commercial applications while only military applications can use leaded manufacturing processes. Many components now specifically require RoHS or non-RoHS procedures for PCB Assembly.
Flux is a chemical resin that is used to facilitate the soldering process. It is responsible for removing dirt and preventing oxidation of the component tips during reflow. They can be classified as either water-soluble fluxes or no-clean fluxes. Water soluble fluxes can be cleaned by using water while no-clean fluxes produced low levels of residue which are not necessary to clean but it is advised to clean with designated chemical wash to provide better result.
Solder pastes consist of solder grains which are available in different sizes which are given numerical designations from Type 1 to Type 8 based on descending order of solder grain sizes. Decrease in solder grain size also highlights the advancements in solder technology where Type 1 was adopted first, and Type 8 is the latest addition to minimum achievable solder grain size.
SOLDER PASTE
Since 2006, commercial solder pastes were manufactured and used without lead and other hazardous materials like cadmium and mercury in accordance with the RoHS directive. The directive also affected key PCB fabrication processes and successfully eliminated usage of hazardous materials for commercial applications. Lead in a traditional tin-lead alloy solder is responsible for lowering the melting temperature of the solder to approx. 183°C and it also helps slow down the rate of tin whisker growth in electronics. The process of finding replacements to maintain those advantages offered by lead is still ongoing. Lead-free solders have higher melting points and are more expensive than leaded solders.
The most popular lead-free solder currently being offered is tin-silver-copper alloy which has a melting temperature of approx. 217°C. This has also resulted in components like resistors, transistors being conformed to RoHS compliance. The main drawback of maintaining RoHS compliance for the product is that it is significantly more expensive than leaded processes and does not yield any benefits of switching to lead-free options. The effect of RoHS directive on component manufacturing and the larger effect on electronics manufacturing will be discussed in detail in future posts.
As of today, Type 3 solder is the most widely used solder paste. The following comparison consists of certain superficial characteristics which are a good point to start at before diving into a thorough discussion for each and exploring more complex properties and features of solder pastes. The reason behind comparing T3, T4 and T5 specifically is that T4 and T5 were recently adopted for mass usage for finer and smaller footprints in the PCB assembly industry while T3 has been the industry standard for a long time.
solder paste
It is important to note that the sensitivity and reactivity of solder paste to temperature change increases as the solder grain size decreases. This is due to increase in the number of solder grains occupying the same area as the solder grain size decreases. Simply put, the greater the number of solder particles in a given area, the more reactive that particular area of solder will be. Therefore, from this we can conclude that T4 solder will melt at a lower temperature than T3, and T5 will melt at a lower temperature than T4. The advantages, disadvantages and the various effects of using small grain-size solders on component structure and performance will be discussed in further detail in the next post.
FLUX
Fluxes are infused in the solder paste and they are released during reflow. The flux is always released before the solder can melt to provide an oxidation-free environment. Its chemical profile consists of a natural or synthetic resin to coat the component pins and pads, activators to release the flux at the right temperature, solvents to facilitate deposition of solder on the joint, and additives to compensate for any modifications in flux composition. Water-soluble and no-clean fluxes are both used in various situations based on the amount of oxidation occurring during reflow, the level of reactivity of the solder, solder grain size, material of the board, and surface finish of the board.
No-clean fluxes are generally used for boards where the corrosion resistance of the surface is weak. It yields low residue on the printed circuit board assembly because the flux either burns off during reflow or it forms noncorrosive, localized residue around the solder joints. Contrary to its name, it does require cleaning post-reflow but less so than most other high-residue fluxes. No-clean solder pastes are used as an industry standard by most electronics manufacturing service providers because of its ease of use. The main drawback of using no-clean flux is that since it is less corrosive, it does not provide as much protection from oxidation as water-soluble flux but that has to be accepted as a trade-off for better quantitative results in large-scale production.
Water-soluble fluxes are generally used for precise action and give excellent results but the main drawback is that they require careful application and condition regulation due to their highly reactive and corrosive nature, and the difficulty in cleaning them post-reflow. Compared to no-clean flux, it produces more residue that cannot be removed easily from the board and due its high corrosivity, it may damage the PCB surface and component leads. Cleaning unwanted residue off the board requires additional machinery which occupies valuable space on the shopfloor. This limits its usage in the industry to only customer requests or specifications to use water-soluble solder pastes.
KEY CONSIDERATIONS FOR PCB DESIGNING
It is important to consider how solder selection will affect your PCB design. For simplicity, the effects will be divided based on solder paste composition, solder size and flux usage. Many of these considerations may overlap or may have to be used in conjunction for achieving the best result.
SOLDER PASTE COMPOSITION:
• Components used on PCB should be first checked to see if they are RoHS compliant or not, based on the solder paste used. Components with RoHS compliance usually have different leads which may or may not be compatible with leaded solders, and it may affect the solderability of the component to the copper pads, the solder joint’s mechanical strength, and component shelf-life and performance. It is also important to ensure the components operating and manufacturing parameters meet the solder paste properties, otherwise components may get burned or dysfunctional during the reflow process, leading to visible or latent component failure.
• Flux selection should be based on solder paste composition. Flux release at specific temperatures should be done in conjunction with the reflow profile for that specific solder paste. Solder melting and flux activation occur at different instances in the reflow process. Early activation of flux may cause surface corrosion, component failure, early burn-off which may lead to poor soldering and late activation may lead to increased oxidation during reflow process along with difficulty in cleaning.
SOLDER SIZE
• Solder grain size should also be considered when choosing component package and its corresponding design footprint on the Printed Circuit Board. Larger footprints do not require smaller grain-size solders. If the grain size is small, say T5, then based on its high reactivity, more number of particles per unit area and greater wetting ability, solder may flow too easily on melting resulting in solder defects which will affect component performance and product life-cycle. The reverse situation, where small footprints are used in conjunction with large grain-size solders, also leads to solder defects.
• Component package selection will also affect stencil aperture size, stencil thickness and solder deposition efficiency. Using large-size solders, say T3 solder, for micro-BGA or 01005-imperial sizes will result in gasketing and insufficient paste deposition; while using small-size solders, say T5 solder, for large footprints may result in bridging.
• The spacing between footprints of separate components, spacing between component leads of the footprint on the Printed Circuit Board should change based on the solder grain-size as using large grain sizes for small footprints, and vice versa, will lead to solder bridging which will in turn affect device performance and life-cycle.
FLUX COMPOSITION
• PCB thickness, material and coatings should be selected based on flux used for the reflow process. One should avoid using water-soluble fluxes for a thin PCB as they are highly corrosive in nature and may lead to excess surface corrosion. Corrosion resistant material and coatings should be used in accordance with the flux selected, as not using them will lead to corrosion and cleaning issues and using them when not needed(say a no-clean flux is being used) will increase cost of production.
All PCB’s should be designed keeping in mind the effects of solder paste, stencil design, flux, process used on
SMT assembly PCB’s. Some of these topics and more will be added to the list and discussed in further detail in the future.
New product designs continue to get more compact, while the performance and the number of features that customers expect continue to increase. To the engineer, this means higher PCB circuit densities and less room on the PCB for just-in-case design, such as unallocated I/O, or 0 ohm resistor networks to allow for reconfiguration of the PCBs at PCB assembly.
Meanwhile, new product prototype cycles are also getting faster. 3D printed mechanical parts are available within hours, putting pressure on electrical engineers to work faster and get their PCB designs right the first time. Even the fastest PCB fabrication, such as PNC’s 24-hour fabrication turn-time can’t help if the PCB has to be redesigned to fix errors.
The answer to both problems may be the CPLD. PNC’s CPLD programmers can help engineers reduce PCB size and allow on the fly circuit reconfiguration. Most people know that PNC specializes in fast PCB prototyping, but PNC is more than aPCB Manufacturer, PNC can speed prototyping by designing PCBs that replace inflexible circuit designs with PCBS that can be reconfigured to remap I/Os or change the order that circuit elements power up. A CPLD design developed by PNC can also allow the same PCB to be reconfigured to be used for the next generation product.
When it comes to programmable circuit elements, FPGA and microprocessors get all the good press. They are powerful, versatile, and generate more revenue for the manufacturers than workhorses such as CPLDS. Even though CPLD capability has improved dramatically over years, while both cost and power consumption have dropped, they are still often considered only for low level tasks such as “Glue Logic.” PNC designers can tell you that even a CPLD used for “low level” glue logic is appreciated when a late breaking design change means that two outputs now need to be two inputs, and one input needs to be inverted. All in a day’s work for PNC.
A PC Board Manufacturer, such as PNC can help you use these new, more capable CPLDs in places that can solve tough problems, replacing more expensive, complex and power-hungry solutions. Here are four examples.
I/O expansion
One of the most common CPLD applications is to expand the number of available microprocessor I/O ports. The CPLD I/O can either be multiplexed to the microprocessor or controlled via a serial interface. The advantage of a serial bus interface is that it allows you to locate this extra I/O anywhere, even on another Printed Circuit Board through a compact two or three pin connector.
The CPLD combinational logic architecture allows the creation of either a big fan-in or fan-out (over a hundred ports in some cases), and the outputs have enough current to drive small LEDS, a great way to create an array of circuit status LEDS.
When the CPLD output is used in conjunction with a CPLD’s internal clock the CPLD can also drive multiple PWM outputs allowing it to control things such as LED brightness, cooling fan speed, and simple sound producing devices.
The CPLD’s architecture gives it another useful capability for I/O expansion, the ability to accept inputs and drive outputs at different voltages. This multi voltage capability is often utilized for another common application; the communication bridge.
Bridges
CPLDs are often used as a bridge between one or more bus protocols, potentially at different voltages. They can support
serial to serial
serial to parallel,
parallel to parallel
They can even be used to drive an LCD. Because of their simple architecture, they have a low pin delay, making high speed synchronization possible.
Power Management
Another one of CPLD’s features is that they retain their programming and will boot within 500 µs. This means that the CPLD is the first programmable element to wake up on power up, so that it is awake and ready to manage the power up of power supplies and programmable devices ensuring they start in the right order.
Safety Systems
Because of the CPLDs simple architecture and 100% deterministic behavior CPLDs are often used in safety critical systems. One example application is to monitor interlocks, ensuring that the system is in a safe condition before the system can begin operation.
CPLDs pack a lot of capabilities into a compact package, they can reduce PCB complexity and allow reconfiguration on the fly. If you have never considered a CPLD in your design, the designers at PNC can help you with the CPLD circuit design, CPLD programming and Circuit board fabrication. Talk to PNC today.
There has been immense development in physical design aspects of designing with the advent of CAD Tools. It’s not that long ago, that we were hand taping on multiple layers of mylar at 2:1, 4:1 and even 8:1, and then having to shoot the artwork with a camera to reduce the film to 1:1. The power of today’s CAD tools can maximize your time whether it be circuit design, circuit simulation, PCB design, or system-level simulation of PCB Layout. In turn, Complex designs can be optimized quicker and more efficiently.
We know that copper traces are used as interconnects or bridges between two unconnected elements of the circuit. The length & shape of these interconnects play an important role in high speed design, since each interconnect is modeled as a combination of resistance, inductance and capacitance, which can in turn change the value of impedance. Taking this into consideration, we try to model PCB Routing Techniques in a more algorithmic and efficient way to improve the speed of the design.
The most challenging task for the designer is the placement of the components in order to minimize the usage of wire and chip area. The design starts with placing the important components of the circuit in terms of design and the entire board to reduce the routing constraints. Finalizing the key elements specific locations (critical components) and routing paths helps in analyzing the critical path and operating frequency of the circuit design. After Placement, particularly for routing a wide variety of analog and digital signals, with varying voltages and currents, ranging from dc to high frequency (GHz), the utmost importance is keeping signals from interfering with one another. The Zero potential planes help in providing a common reference point for devices as well as helping device shielding in order to compensate for any extra amount of current. In the case where signal isolation is required, we need to concentrate on the physical distance between the signal traces.
Major Routing key points
Distance between two interconnects must be minimized for particular path.
There should be no sharp bends, (90 Deg.) in the track design.
Tracks should exit from the center of a connection point, avoiding other interconnects and pads in order to have a high speed and error free design.
Do not place via under component.
Image: Proper angle routing (left) and bad routing (right)
Reduction in long traces on adjacent layers to prevent capacitive coupling.
Reduction in long parallel runs and close proximity of signal traces in order to reduce or eliminate inductive coupling (practically impossible) in a design.
Signal traces requiring high isolation should be routed on separate layers and if not possible, orthogonal routing can be done. Orthogonal routing will help in minimizing the capacitive coupling which will lead to the shielding effect by the ground or zero potential.
Automated Routing Techniques can be used for increasing speed
Auto routing within a Design exhausts all the possible implementations of the given possible design and helps to improve the performance, reliability and cost of the circuit design. This innovation is referred to as Electronic Design Automation. The technology has advanced with usage of Artificial intelligence and neural based technology. Automated routers are mainly used when you have a complex board with little routing space. Advanced automated routers allow you to specify exactly how you electrically want to layout the most important tracks. Below is the list of general purpose routing techniques and algorithms (These are algorithm models related to CAD Routing tools) , apart from this there are special routing techniques for power and clock like H-clock tree synthesis.
Example of High Speed PCB Routing Technique
Top Layer PCB Design and Final Chip Implementation
The left hand side of the above diagram shows the top view implementation of a PCB design. Due to the simplicity of this design, we can mount all the circuit components on the top layer. The above design will help in eliminating the signal trace which ensures the best possible speed and design of the circuit. The key points in this PCB design is the reduced delay time because the separation of larger bypass caps are placed farther away with ferrite Chips for HF isolation of currents and multiple via which reduces the delay path in the circuit.
