\u00a0<\/em>What is Crosstalk?<\/strong><\/p>\n Crosstalk occurs when the signal on an aggressor trace on a PCB appears on a nearby victim trace, due to capacitive and inductive coupling between the two traces.\u00a0 Typical aggressor signal traces are:<\/p>\n \u25cf High speed digital signals, especially clock signals Victim signal traces, on the other hand, carry high impedance signals like op amp input lines or reset lines, or low impedance signals with long loops.\u00a0\u00a0 Low amplitude signals such as a sensitive analog measuring circuit traces are also susceptible.<\/p>\n Crosstalk occurs when aggressor trace and victim trace are close together and run in parallel for a distance.\u00a0 The aggressor and victim(s) can be side to side on the same layer or on top of each other on adjacent signal layers. Coupling between traces on adjacent layers separated by just a thin section of laminate is called broadside coupling.<\/p>\n <\/p>\n <\/p>\n <\/p>\n <\/p>\n <\/p>\n Printed Circuit Board<\/a> Design guidelines to reduce crosstalk<\/strong><\/p>\n There are several design rules to reduce crosstalk between signal traces.\u00a0 Before applying these rules, the first step is to use the general guidelines described above to identify and flag any potential aggressor signal traces and their potential victims.<\/p>\n Since crosstalk occurs between two traces running in parallel, try to reduce the distance that the aggressor and victim traces run in parallel. Unfortunately, this may be difficult if the signals originate and terminate from the same locations.\u00a0 To minimize broadside coupling try to orient the signal traces east-west on one layer and north-south on the second layer.<\/p>\n It is essential to have a broad contiguous ground plane directly under (or over) the signal layer.\u00a0 A ground plane located between two signal layers can prevent broadside coupling. However, make sure that ground planes located on adjacent layers but not electrically connected do not overlap.\u00a0 The overlapping ground planes separated by a dielectric form a capacitor, which can transmit noise from one ground plane to the other. This can defeat the purpose of separate ground planes if they were created to isolate the noisy elements of a circuit from the noise sensitive ones.<\/p>\n Increasing trce spacing<\/strong><\/p>\n The most effective method of reducing crosstalk is to increase the spacing between the aggressor signal trace and the potential victim traces.\u00a0 Like all electromagnetic radiation, electrical or magnetic coupling between the two traces drops with the square of the distance between them.\u00a0 The amount of spacing required between the traces is dependent on the height of the traces above the ground plane.\u00a0\u00a0 The formula defining this relationship is from Douglas Brooks \u201cCrosstalk Coupling: Single-Ended vs. Differential\u201d<\/a>\u00a0\u00a0 The coupling between two traces is proportional to:<\/p>\n Where S is the spacing between traces, and H is the distance from the trace to the ground plane.\u00a0 Once H is defined by the lamination stack-up<\/a>, the relative change in coupling can be easily plotted as a function of S.\u00a0 Douglas Brooks looks in detail at the coupling between traces under several scenarios.\u00a0 For those looking for some general guidance, a spacing of 5H is considered conservative.\u00a0 The PC Board<\/a> design team at PNC can assist designing a PCB stack up<\/a> that will minimize the spacing needed between coupled traces, ensuring that crosstalk is minimized while maintaining routing density.<\/p>\n Finally, for very high speed digital signal traces, consider the use of differential pairs.\u00a0 For many designers, the most common applications for a differential pair is for a high speed serial bus like USB, SATA, or HDMI.\u00a0 The design rules for the layout of differential traces is beyond the scope of this post.<\/p>\n The most important part of reducing crosstalk in your PCB design is to first recognize in which signal traces crosstalk is likely to occur, then follow the guidelines above to minimize it.\u00a0 PNC\u2019s Printed Circuit Board<\/a> designers have experience with high speed digital and RF circuits and can help you select the correct PCB layer stack-up<\/a> and review your designs for areas where crosstalk is likely and suggest ways to minimize it. Request a design review from PNC today<\/p>\n
\n\u25cf Noise from switching power suppliers
\n\u25cf High frequency RF.<\/p>\n![\"Minimizing](\"https:\/\/www.pnconline.com\/blog\/wp-content\/uploads\/2021\/04\/Minimizing-Crosstalk-in-PC-Board-Layout-300x169.png\")
<\/a>