In this ongoing series on PCB layout from the design team at PNC, previous posts have looked at some of the initial steps to turn a circuit schematic into a manufacturable, reliable PCB. These posts have looked at component placement, selecting appropriate trace widths, and BGA routing. In this post we are going to take a deeper dive into methods for reducing crosstalk in the PCB design. After the power and ground have been routed, the next task is to route high speed signal traces, and the traces that could either generate or receive crosstalk.
What is Crosstalk?
Crosstalk occurs when the signal on an aggressor trace on a PCB appears on a nearby victim trace, due to capacitive and inductive coupling between the two traces. Typical aggressor signal traces are:
● High speed digital signals, especially clock signals
● Noise from switching power suppliers
● High frequency RF.
Victim signal traces, on the other hand, carry high impedance signals like op amp input lines or reset lines, or low impedance signals with long loops. Low amplitude signals such as a sensitive analog measuring circuit traces are also susceptible.
Crosstalk occurs when aggressor trace and victim trace are close together and run in parallel for a distance. The aggressor and victim(s) can be side to side on the same layer or on top of each other on adjacent signal layers. Coupling between traces on adjacent layers separated by just a thin section of laminate is called broadside coupling.
Printed Circuit Board Design guidelines to reduce crosstalk
There are several design rules to reduce crosstalk between signal traces. Before applying these rules, the first step is to use the general guidelines described above to identify and flag any potential aggressor signal traces and their potential victims.
Since crosstalk occurs between two traces running in parallel, try to reduce the distance that the aggressor and victim traces run in parallel. Unfortunately, this may be difficult if the signals originate and terminate from the same locations. To minimize broadside coupling try to orient the signal traces east-west on one layer and north-south on the second layer.
It is essential to have a broad contiguous ground plane directly under (or over) the signal layer. A ground plane located between two signal layers can prevent broadside coupling. However, make sure that ground planes located on adjacent layers but not electrically connected do not overlap. The overlapping ground planes separated by a dielectric form a capacitor, which can transmit noise from one ground plane to the other. This can defeat the purpose of separate ground planes if they were created to isolate the noisy elements of a circuit from the noise sensitive ones.
Increasing trce spacing
The most effective method of reducing crosstalk is to increase the spacing between the aggressor signal trace and the potential victim traces. Like all electromagnetic radiation, electrical or magnetic coupling between the two traces drops with the square of the distance between them. The amount of spacing required between the traces is dependent on the height of the traces above the ground plane. The formula defining this relationship is from Douglas Brooks “Crosstalk Coupling: Single-Ended vs. Differential” The coupling between two traces is proportional to:
Where S is the spacing between traces, and H is the distance from the trace to the ground plane. Once H is defined by the lamination stack-up, the relative change in coupling can be easily plotted as a function of S. Douglas Brooks looks in detail at the coupling between traces under several scenarios. For those looking for some general guidance, a spacing of 5H is considered conservative. The PC Board design team at PNC can assist designing a PCB stack up that will minimize the spacing needed between coupled traces, ensuring that crosstalk is minimized while maintaining routing density.
Finally, for very high speed digital signal traces, consider the use of differential pairs. For many designers, the most common applications for a differential pair is for a high speed serial bus like USB, SATA, or HDMI. The design rules for the layout of differential traces is beyond the scope of this post.
The most important part of reducing crosstalk in your PCB design is to first recognize in which signal traces crosstalk is likely to occur, then follow the guidelines above to minimize it. PNC’s Printed Circuit Board designers have experience with high speed digital and RF circuits and can help you select the correct PCB layer stack-up and review your designs for areas where crosstalk is likely and suggest ways to minimize it. Request a design review from PNC today