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Minimizing Crosstalk in PC Board Layout

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In this ongoing series on PCB layout from the design team at PNC, previous posts have looked at some of the initial steps to turn a circuit schematic into a manufacturable, reliable PCB. These posts have looked at  component placement, selecting appropriate trace widths, and BGA routing.   In this post we are going to take a deeper dive into methods for reducing crosstalk in the PCB design. After the power and ground have been routed, the next task is to route high speed signal traces, and the traces that could either generate or receive crosstalk.

 What is Crosstalk?

Crosstalk occurs when the signal on an aggressor trace on a PCB appears on a nearby victim trace, due to capacitive and inductive coupling between the two traces.  Typical aggressor signal traces are:

● High speed digital signals, especially clock signals
● Noise from switching power suppliers
● High frequency RF.

Victim signal traces, on the other hand, carry high impedance signals like op amp input lines or reset lines, or low impedance signals with long loops.   Low amplitude signals such as a sensitive analog measuring circuit traces are also susceptible.

Crosstalk occurs when aggressor trace and victim trace are close together and run in parallel for a distance.  The aggressor and victim(s) can be side to side on the same layer or on top of each other on adjacent signal layers. Coupling between traces on adjacent layers separated by just a thin section of laminate is called broadside coupling.

Minimizing Crosstalk in PC Board Layout
Minimizing Crosstalk in PC Board Layout

 

 

 

 

 

Printed Circuit Board Design guidelines to reduce crosstalk

There are several design rules to reduce crosstalk between signal traces.  Before applying these rules, the first step is to use the general guidelines described above to identify and flag any potential aggressor signal traces and their potential victims.

Since crosstalk occurs between two traces running in parallel, try to reduce the distance that the aggressor and victim traces run in parallel. Unfortunately, this may be difficult if the signals originate and terminate from the same locations.  To minimize broadside coupling try to orient the signal traces east-west on one layer and north-south on the second layer.

It is essential to have a broad contiguous ground plane directly under (or over) the signal layer.  A ground plane located between two signal layers can prevent broadside coupling. However, make sure that ground planes located on adjacent layers but not electrically connected do not overlap.  The overlapping ground planes separated by a dielectric form a capacitor, which can transmit noise from one ground plane to the other. This can defeat the purpose of separate ground planes if they were created to isolate the noisy elements of a circuit from the noise sensitive ones.

Increasing trce spacing

The most effective method of reducing crosstalk is to increase the spacing between the aggressor signal trace and the potential victim traces.  Like all electromagnetic radiation, electrical or magnetic coupling between the two traces drops with the square of the distance between them.  The amount of spacing required between the traces is dependent on the height of the traces above the ground plane.   The formula defining this relationship is from Douglas Brooks “Crosstalk Coupling: Single-Ended vs. Differential”   The coupling between two traces is proportional to:

Where S is the spacing between traces, and H is the distance from the trace to the ground plane.  Once H is defined by the lamination stack-up, the relative change in coupling can be easily plotted as a function of S.  Douglas Brooks looks in detail at the coupling between traces under several scenarios.  For those looking for some general guidance, a spacing of 5H is considered conservative.  The PC Board design team at PNC can assist designing a PCB stack up that will minimize the spacing needed between coupled traces, ensuring that crosstalk is minimized while maintaining routing density.

Finally, for very high speed digital signal traces, consider the use of differential pairs.  For many designers, the most common applications for a differential pair is for a high speed serial bus like USB, SATA, or HDMI.  The design rules for the layout of differential traces is beyond the scope of this post.

The most important part of reducing crosstalk in your PCB design is to first recognize in which signal traces crosstalk is likely to occur, then follow the guidelines above to minimize it.  PNC’s Printed Circuit Board designers have experience with high speed digital and RF circuits and can help you select the correct PCB layer stack-up and review your designs for areas where crosstalk is likely and suggest ways to minimize it. Request a design review from PNC today

TOTAL-CONCEPT

Total Concept Company

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PNC’s expertise in design, manufacturing printed circuit boards, PCB assembly, and Box builds in one 70,000 sq./ft. facility makes us the ultimate total concept company. PNC’s unique manufacturing facility is just that, a PCB assembly usa manufacturer located in Nutley, New Jersey. PNC has been a vital supplier of electronics in the PCB industry for over 50 years and serves the military/defense, medical, aerospace, automotive, RF/Microwave, industrial and consumer sectors. Having these capabilities all in-house stream lines the turnkey process under one PO which is invaluable to our customers.

ELECTRONIC DESIGN

Being able to design in-house has its importance when designing for PCB manufacturing as well as prototype pcb assembly and production PCB assembly. Our designers have an edge in designing for PCB manufacturing since they are knowledgeable of the PCB manufacturing process. Designing for manufacturability eliminates defects, delays and process issues. Our design tools used are Cadence Allegro, OrCAD Capture, OrCAD PCB Designer and PADS. Our deliverables are Gerber, drill files, PCB File, schematics, Assembly and fabrication files and Formal drawings on customer format.

Having the capability to manufacture printed circuit boards, pcb contract manufacturing, in the same facility also has its benefits for prototype pcb assembly and production PCB assembly. While the printed circuit boards are in process of being fabricated, our pcb assembly division can work in parallel creating pick & place data, SMT Stencils, work instructions, AOI programing, selective soldering programming, and pre-pare testing procedures to expedite the PCB’s once the hit the SMT assembly floor. The work in parallel process makes for an efficient seamless transition from PCB manufacturing to Assembly.

TOTAL-CONCEPT-PCB
TOTAL-CONCEPT-PCB

After the PCB’s clear final inspection, they are transferred to the PCB assembly department. For a pcb assembly manufacturer in a total concept configuration, logistically you gain 1-2 days shipping time, since you do not have to outsource the PCB’s as well as a time savings of not have to perform an incoming inspection. PNC’s Assembly division is comprised of multiple high speed SMT lines with 13 zone re-flow ovens, 3d AOI, 3D X-ray, thru-hole stations, selective soldering, and rework stations. If required, PNC can perform Flying probe, ICT and functional testing to ensure a robust and error free PCBA.

Another SMT assembly service with-in our total concept company is box building. The PCB assembly never leaves the facility eliminating any ESD issues from incoming inspection handling. Our expertise in box building varies from small plastic snap together housing, medium sized metal enclosures to rack builds. If provided with a system test procedure, PNC testing engineers and technicians can perform the functional and burn in testing. When looking for total concept printed circuit assembly companies, we are here to help.

pcb manufactuter USA

Let PNC Simplify Your Printed Circuit Board Design With, CPLDs

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New product designs continue to get more compact, while the performance and the number of features that customers expect continue to increase. To the engineer, this means higher PCB circuit densities and less room on the PCB for just-in-case design, such as unallocated I/O, or 0 ohm resistor networks to allow for reconfiguration of the PCBs at PCB assembly.

Meanwhile, new product prototype cycles are also getting faster. 3D printed mechanical parts are available within hours, putting pressure on electrical engineers to work faster and get their PCB designs right the first time. Even the fastest PCB fabrication, such as PNC’s 24-hour fabrication turn-time can’t help if the PCB has to be redesigned to fix errors.

The answer to both problems may be the CPLD. PNC’s CPLD programmers can help engineers reduce PCB size and allow on the fly circuit reconfiguration. Most people know that PNC specializes in fast PCB prototyping, but PNC is more than aPCB Manufacturer, PNC can speed prototyping by designing PCBs that replace inflexible circuit designs with PCBS that can be reconfigured to remap I/Os or change the order that circuit elements power up. A CPLD design developed by PNC can also allow the same PCB to be reconfigured to be used for the next generation product.

When it comes to programmable circuit elements, FPGA and microprocessors get all the good press. They are powerful, versatile, and generate more revenue for the manufacturers than workhorses such as CPLDS. Even though CPLD capability has improved dramatically over years, while both cost and power consumption have dropped, they are still often considered only for low level tasks such as “Glue Logic.” PNC designers can tell you that even a CPLD used for “low level” glue logic is appreciated when a late breaking design change means that two outputs now need to be two inputs, and one input needs to be inverted. All in a day’s work for PNC.

A PC Board Manufacturer, such as PNC can help you use these new, more capable CPLDs in places that can solve tough problems, replacing more expensive, complex and power-hungry solutions. Here are four examples.

I/O expansion

One of the most common CPLD applications is to expand the number of available microprocessor I/O ports. The CPLD I/O can either be multiplexed to the microprocessor or controlled via a serial interface. The advantage of a serial bus interface is that it allows you to locate this extra I/O anywhere, even on another Printed Circuit Board through a compact two or three pin connector.

The CPLD combinational logic architecture allows the creation of either a big fan-in or fan-out (over a hundred ports in some cases), and the outputs have enough current to drive small LEDS, a great way to create an array of circuit status LEDS.

When the CPLD output is used in conjunction with a CPLD’s internal clock the CPLD can also drive multiple PWM outputs allowing it to control things such as LED brightness, cooling fan speed, and simple sound producing devices.

The CPLD’s architecture gives it another useful capability for I/O expansion, the ability to accept inputs and drive outputs at different voltages. This multi voltage capability is often utilized for another common application; the communication bridge.

Bridges

CPLDs are often used as a bridge between one or more bus protocols, potentially at different voltages. They can support

  • serial to serial
  • serial to parallel,
  • parallel to parallel

They can even be used to drive an LCD. Because of their simple architecture, they have a low pin delay, making high speed synchronization possible.

Power Management

Another one of CPLD’s features is that they retain their programming and will boot within 500 µs. This means that the CPLD is the first programmable element to wake up on power up, so that it is awake and ready to manage the power up of power supplies and programmable devices ensuring they start in the right order.

Safety Systems

Because of the CPLDs simple architecture and 100% deterministic behavior CPLDs are often used in safety critical systems. One example application is to monitor interlocks, ensuring that the system is in a safe condition before the system can begin operation.

CPLDs pack a lot of capabilities into a compact package, they can reduce PCB complexity and allow reconfiguration on the fly. If you have never considered a CPLD in your design, the designers at PNC can help you with the CPLD circuit design, CPLD programming and Circuit board fabrication. Talk to PNC today.